This invention relates to integrated circuit devices for digital clocks and, more particularly, to an integrated circuit device for digital clocks, which is capable of transmitting time information to an external data processing unit such as a microprocessor.
Up to date, integrated circuit devices for digital clocks are inexpensively available, and also they find very extensive applications. These applications include those where they are used for timer processing in combination with various systems other than those dealing with time information such as time clocks, calendars and stopwatches. Further, in the field of controls and applications dealing with unit time such as one minute and one second there is a demand for combining an integrated or LSI circuit with a central processing unit (CPU) such as a microprocessor. Such demand is based upon a concept that with the provision of the microprocessor with a function as clock, the processing efficiency of the microprocessor is reduced for the clock function must be fulfilled by part of the processing capacity of the microprocessor, and that it is thus better to realize the clock function with an exclusive clock LSI circuit device and permit time information such as time-of-day data to be transferred from the exclusive LSI circuit device to the microprocessor when required.
With the prior-art clock LSI circuit device, however, time information which is to be coupled to the microprocessor is produced from terminals for time-of-day data display drive signal. Therefore, a converting circuit for converting, for instance, a 7-segment display drive signal into a corresponding BCD code for coupling to the microprocessor must be connected between the clock LSI circuit and microprocessor.
FIG. 1 is a schematic showing the connection of a prior-art clock LSI circuit device and a microprocessor as central processing unit (CPU).
Referring to the FIG. 1, a clock LSI circuit 12 provides 1-minute, 10-minutes, 1-hour and 10-hours digit outputs. These outputs, which are each 7-bit display data, are coupled to respective 7-segment display sections 14.sub.1, 14.sub.2, 14.sub.3 and 14.sub.4 for displaying time information (as static display in this case). Meanwhile, these outputs are also supplied to respective converting circuit sections 18.sub.1, 18.sub.2, 18.sub.3 and 18.sub.4 which convert their inputs so that their outputs can be coupled to a microprocessor 16.
The converting circuits 18.sub.1, 18.sub.2, 18.sub.3 and 18.sub.4 each include a diode section 20 for cutting off low level potential of the input signal, an encoder 22 and a pull-down resistor section 24 for coupling the level-converted input signal to the encoder 22. The BCD code that is obtained from the encoder 20 in each converting circuit is coupled to data selectors 24.sub.1 and 24.sub.2, which are 4-channel data selectors and supply time data of a given digit to a microprocessor 16 in accordance with a digit selection signal coupled to them.
FIG. 2 is a schematic showing another example of the connection between prior-art clock LSI circuit and microprocessor. In this example, time information is displayed as dynamic display. In the Figure, like parts as those in FIG. 1 are designated by like reference symbols, and they are described no further.
More particularly, a dynamic clock LSI 26 provides 7-segment information of 7 bits a to g to 7-segment fluorescent tube display sections 28.sub.1 to 28.sub.4. It also produces digit selection information D.sub.1 to D.sub.4 which are coupled to the respective display sections 28.sub.1 to 28.sub.4. Thus, display sections, to which digit selection data of a logical high level are coupled, are energized for display. The time information of 7 bits a to g is also supplied to a converting circuit 18.sub.1, which has the same construction as the converting circuits 18.sub.1 to 18.sub.4 shown in FIG. 1, for conversion to a corresponding BCD code to be supplied to the microprocessor 16. The digit selection information D.sub.1 to D.sub.4, selectively produced from the clock LSI circuit 26, is also coupled to a level conversion circuit 30, and the level conversion output therefrom is coupled to the microprocessor 16.
As has been shown, where a clock LSI circuit and a CPU are used in combination, the system itself is complicated, and also the processing efficiency of the CPU is reduced.
In addition, for displaying the result of data processing in the microprocessor a separate display unit is connected to a bus line to the microprocessor independently of the display unit for displaying the time information, and this is undesired from the standpoint of economy.